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lbaops:dfb3das [2009/05/28 12:24]
chris.phillips
lbaops:dfb3das [2010/12/21 15:00]
chris.phillips
Line 8: Line 8:
  
   *  1 GHz or 256 MHz front end bandwidth   *  1 GHz or 256 MHz front end bandwidth
-  *  Divide by 16 filterbank (ie 64 MHz channels with 1 GHz front end)+  *  Divide by 16 filterbank (ie 64 MHz channels with 1 GHz front end)
 +    *  16 MHz channels with 256 MHz front end
   *  Bits selectable from 1-8   *  Bits selectable from 1-8
   *  UDP data transport with simple 24 byte timing header   *  UDP data transport with simple 24 byte timing header
Line 17: Line 18:
  
   *  More filterbank options (divide by 32 and divide by 64 have filters already designed)   *  More filterbank options (divide by 32 and divide by 64 have filters already designed)
-  *  VDIF packet headers+    *  Giving 32/16 MHz channels with 1 GHz front end or 8/4 MHz with 256 MHz front end) 
 +  *  [[http://www.vlbi.org/vdif/VDIF ]] packet headers 
   *  Packet sizes to conform to VDIF requirements, specifically an integral number of packets/sec   *  Packet sizes to conform to VDIF requirements, specifically an integral number of packets/sec
-  *  (Optional) Linear->circular conversion 
-    *  including calibration of x-y phase correction 
   *  Tsys monitoring   *  Tsys monitoring
  
 ====  Potential extra work ==== ====  Potential extra work ====
-  *  Fringe rotation +  *   Linear->circular conversion 
-  *  Complex sampling +    *  including calibration of x-y phase correction 
-  *  "Zoom modes", ie full channelization+  *  Single stage filter design (not the current "high resolutionfilter followed by a reverse filter.
  
  
lbaops/dfb3das.txt · Last modified: 2015/12/18 16:38 (external edit)